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Workshop "SIMD parallelism and Intel Vectorization Advisor"

Anfang
29.02.2016 09:30 Uhr
Ende
29.02.2016 17:30 Uhr
Veranstaltungsort
JSC, Rotunde, Geb. 16.4, R. 301

Presenter: Zakhar A. Matveev, PhD, Product Architect in Intel Software and Services Group.

Agenda:

  1. Introductory training (9:30 – 12:00)

    1. SIMD parallel programming, x86 SIMD, AVX/AVX-512, OpenMP4.x SIMD introductory, compiler and programming models for SIMD.
    2. Vectorization Advisor and Intel Compiler in action: presentation and customer code (CFD) optimization demo
    3. Showcase and discuss experimental new pre-Beta 2017 capabilities:

      1. FLOPs and Masks profiler.
      2. Automated Roofline analysis
    4. Discuss FZJ vectorization experiences – 1 (SIMD pain points, current experiences with Compiler/Advisor)
  2. Bring Your Own Code session (13:00 – 17:30).

    1. Quick how-to for Advisor/Compiler (hands-on initialization).
    2. Hands-on – part 1
    3. Discuss FZJ vectorization experiences – 2 (new feature requests and so on)
    4. Showcase Advisor AVX-512 analysis
    5. Hands-on – part 2

Registration and further information: Dr. Daniel Rohe, d.rohe@fz-juelich.de


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