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POWER Acceleration and Design Center: 2016 Workshop

Anfang
17.10.2016 13:00 Uhr
Ende
18.10.2016 15:00 Uhr
Veranstaltungsort
Jülich Supercomputing Centre, Rotunde, Geb. 16.4, R. 301
Referenten:
Benedikt Anlauf (IBM), Costas Bekas (IBM), Marcel Bornemann (FZJ/IAS), Christoph Hagleitner (IBM), Andreas Herten (FZJ/JSC), Marcel Huysegoms (FZJ/INM), Guido Juckeland (HZDR), Jiri Kraus (NVIDIA), Charles Moulinec (STFC) and others
Inhalt:
The “POWER Acceleration and Design Center” (PADC) has been established in 2015 to facilitate joined efforts on high-performance computing based on solutions emerging in the context of the OpenPOWER Foundation. With this annual workshop we will bring together experts from different areas to present their experience on applications and new technologies.
Zeit:
Monday, 17 October 2016, 13:00, until
Tuesday, 18 October 2016, 15:00
Ort:
Jülich Supercomputing Centre, R. 301, Geb. 16.4 (Rotunde)
Anmeldung:
Interested scientists are cordially invited to participate. The number of participants is limited and we therefore ask for registration at: https://indico-jsc.fz-juelich.de/e/PADC16
Ankündigung als pdf-Datei:
 POWER Acceleration and Design Center: 2016 Workshop (PDF, 73 kB)

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