ExaCluster Laboratory (ECL)
The ExaCluster Laboratory (ECL) has been established in May 2010 by the Forschungszentrum Jülich, Intel and ParTec. In ECL the three partners are conducting R&D to guarantee affordable and reliable operation of HPC Clusters reaching Exascale levels of performance. The lab employs in total a dozen researchers from Juelich, Intel and ParTec and is expected to grow its staff over time.
The ExaCluster Lab touches hardware and software topics: processor and system architecture for extreme scalability and power efficiency, highly efficient and robust communications and management middleware, scalable performance analysis tools, and top tier applications from science and engineering.
Marquee projects with substantial ECL involvement include the Framework 7 project DEEP (“Dynamical Exascale Entry Platform”) running since December 2011 and its sibling DEEP-ER (“DEEP - Extended Reach”) which started in October 2013. As a centerpiece of the ECL’s research the DEEP project investigates a new class of HPC Clusters based on Intel® Xeon Phi™ which pushes back the scalability limitations expressed by Amdahl’s law and enables application sections to be run at exactly the right level of parallelism.
Current work of ECL focuses on the design, realisation, and evaluation of DEEP’s Cluster-Booster Architecture.
Main aspects of this work are:
- Design and construction of the DEEP System: the first prototype of the DEEP Cluster Booster Architecture
- Design and development of the DEEP programming environment
- Address scalability challenges and improvements needed for cluster computing to run at Exascale
- Development of new resiliency techniques for Exascale computing
- Preparing scientific applications for Exascale: porting to the DEEP Architecture
- Evaluation of novel processor architectures and early porting of scientific applications
Contact: Norbert Eicker email@example.com
- Intel Exascale Leadership Conference: “How will we use Exascale systems?”. Conference of the Intel European Exascale Labs in October 22nd-23rd 2013, Nice (France).
- Intel MIC JSC-intern Workshop, 26th and 27th September 2013, Juelich (Germany).
- ECL internal review meeting, 27th September 2013, Braunschweig (Germany).
- Intel Exascale Labs workshop on programming models, 25th October 2012, Leuven (Belgium).
- Report 2012 from the Intel European Exascale Labs
„Intel ExaCluster Lab – Jülich, Germany“, pages 8-9,
A.Alvarez Mallon, N.Eicker, M.E.Innocenti, G.Lapenta, Th.Lippert, and E.Suarez: „The Scalability of the Cluster-Booster Concept: A critical assessment ofthe DEEP architecture“, pages 22-31
B.Mohr: „Scalasca – A Scalable Parallel Performance Measurement and Analysis Toolset“, pages 32-35
- Report 2011 from the Intel European Exascale Labs
„Intel ExaCluster Lab – Jülich, germany“, pages 6-7
N.Eicker and Th.Lippert: „DEEP – An Accelerated Cluster Architecture for Exascale Computing“, page 12-17
M.Kauschke, J.Kreutz, J.H.Meinke, and B.Stukken: „Protein Folding with SMMP on Intel®MIC Architecture“, pages 18-21