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The disposable DotFET:
Locally strained silicon for CMOS

The goal of the d-DotFET research activities is the evaluation of an entirely new path to fabricate strained Si nano-devices which are compatible to Si CMOS processing. The idea is to fabricate field effect transistors from strained Si bridges, which have been manufactured by disposing embedded, sacrificial Ge islands (dots).

To achieve the required positioning of the Ge dots, templated self assembling is explored. This approach promises high speed electronics, due to the large mobility of carriers in strained Si, substantially reduced short channel effects, since the thickness of the channel is defined by an air bridge, and an improved thermal conductivity, which is attributed to the all Si device design.

d-dot-FETSchematic illustration of a disposable dot field-effect-transistor


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