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Advertising division: ZEA-2 - Electronic Systems
Reference number: 2019M-027, Electrical engineering or physics

Master Thesis: Development of a data acquisition system for Silicon Photomultipliers based on Vulcan receiver front-end ASIC

The Central Institute of Engineering, Electronics and Analytics – Electronic Systems (ZEA-2) is a scientific engineering institute of Forschungszentrum Jülich GmbH performing research and development projects in close cooperation with the institutes of the research center as well as external partners. The focus of our work is electronic and information technology system solutions in sensor and detector technology, signal and data processing as well as measurement techniques. Hereby the preferred approach are highly integrated silicon-based System-on-Chip (SoC) solutions.

Project Description:
Our institute is currently carrying out several detector development projects, where silicon photomultipliers (SiPM) are used. Most of state-of-the-art SiPMs require analog readout electronics with longer connection distances carrying weak analog SiPM signals to data acquisition systems, often residing far away from the sensors. Therefore, an appealing solution is to digitize the signal as close as possible to the SiPMs and transfer the data using digital differential lines, less sensitive to external electromagnetic disturbances. Since most of detector systems used in medical and physics applications require multi-sensor designs, reading several sensors using one front-end chip provides design optimization from material cost and complexity point of view.

In ZEA-2 a special receiver front-end, the so-called Vulcan ASIC, has been developed with the primary task to readout photomultiplier tubes (PMT). With the given similarities between SiPM and PMT output signals, the chip can be used for SiPM readout as well. The chip functionality includes digitization of input signals with speeds up to 1GS/s, data processing, triggering, chip configuration using JTAG, and a 16-bit data output interface.

Your Tasks:

In the framework of this project, a demonstrator will be implemented to validate the Vulcan chip for SiPM readout. The front-end will be interfaced to at least two SiPMs (e.g. from Hamamatsu), and the readout of digitalized data will be performed using a logic analyzer or a separate FPGA card. In addition, a PC software will be implemented to program the front-end and readout digital data from hardware for further analysis and visualization. An additional task will be testing of the demonstrator in strong magnetic fields.

Your Profile:

  • Knowledge of programming and data processing (e. g. MATLAB or C/C++)
  • Experience in laboratory equipment and test bench development
  • First experience in FPGA systems
  • Willingness to teamwork is expected

Our Offer:

  • Opportunity to work together in a team of highly motivated scientists and technicians
  • Possibility to work on the whole development chain
  • Further development of your personal abilities in connection with a socially balanced work environment
  • Strongly supported on-the-job training at the start
  • A comprehensive further training program, including possible German language course

Forschungszentrum Jülich GmbH aims to employ more women in this area and therefore particularly welcomes applications from women.

We also welcome applications from disabled persons.

Did we raise your attention and you got curious?
We are looking forward for your application.
For further information please contact:

Forschungszentrum Jülich GmbH
Central Institute of Engineering, Electronics and Analytics
ZEA-2 – Electronic Systems
Britta Hallmann
52425 Jülich