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Mont-Blanc 2020

European Approach Towards Energy Efficient High Performance Computing

The Mont Blanc projects aim to assess the potential of Arm-based clusters to address Exascale HPC needs, and develop the corresponding software ecosystem. The latest project in the series, the Mont-Blanc 2020 project, intends to pave the way to the future low-power European processor for Exascale.

Mont-Blanc 2020's target is to reach exascale-level power efficiency (50 Gflops/Watt at processor level) with a second generation planned for 2022. Therefore, the project will:

  1. define a low-power System-on-Chip (SoC) implementation targeting Exascale, with built-in security and reliability features;
  2. introduce strong innovations to improve efficiency with real-life applications and to outperform competition (vector instruction implementation, memory latency and bandwidth, power management, 2.5D integration);
  3. develop key modules (IPs) needed for this implementation;
  4. provide a working prototype demonstrating MB2020 key components and system level simulations, with a co-design approach based on real-life applications;
  5. explore the reuse of these building blocks to serve other markets than HPC.

Partners

BULL SAS, France
Project Coordinator

Forschungszentrum Jülich GmbH, Germany
The contact person is Dirk Pleiter d.pleiter@fz-juelich.de

and 5 further organisations.


Mont-Blanc 2020 is funded by the European Union’s Horizon 2020 ICT Research and Innovation action under Grant Agreement 779877.

The grant period is December 2017 until November 2020.

More detailed information about the project is available at the project's homepage.


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