Speaker:

Jeffrey S. Vetter, Oak Ridge National Laboratory, USA

Abstract:

Concerns about energy-efficiency and reliability have forced our community to reexamine the full spectrum of architectures, software, and algorithms that constitute the HPC ecosystem. While architectures have remained relatively stable for almost two decades, new architectural features, such as heterogeneous processing, non-volatile memory, and optical interconnection networks, have emerged as possible solutions to these constraints. In turn, these architectural changes will force software systems and applications to be redesigned to exploit these new capabilities. To tackle this challenge of power consumption and cost, we are investigating the design of future memory hierarchies, which includes nonvolatile memory. In this talk, I will sample these emerging memory technologies and discuss how we are preparing applications and software for these upcoming systems with radically different memory hierarchies.

Date:

Tuesday, 1 March 2016, 14:00

Venue:

Jülich Supercomputing Centre, Hörsaal, building 16.3, room 222

Announcement as pdf file: