Building a Neuromorphic Accelerator Model: Internship Experience at ICA
In February, Alexander Sulaberidze, Student of Electrical and Computer Engineering at Free University of Tbilisi, Georgia, spent a one-month internship at our institute ICA | PGI-4. During this time, he was able to gain many new insights thanks to the Georgian-German Science Bridge project. We are happy that Alexander contributed so well and at the end of his internship he also gave a lecture in our weekly lecture series.
The Georgian-German Science Bridge (GGSB) has promoted the Smart-Digital-Development-Lab (SDDL) Project in cooperation with Volkswagen Stiftung to create a unique learning and working environment beneficial to all cooperating parties.
Selected students from Agricultural University of Georgia have the opportunity to deepen their knowledge of Hardware Description Languages. Building on their existing expertise, they develop a common foundation that enables them to apply their skills in practice under the guidance of experienced FZJ colleagues.
Students have access to a state-of-the-art development environment for the entire process from conceptual phase and collaborative code development via cutting-edge Xilinx tools to hardware deployment and testing.
At the same time, Forschungszentrum Jülich projects benefit from the academic and practical contributions of the Georgian students whether they visit the research center or contribute remotely from Georgia.
In the following, Alexander reports on his experiences at our institute.
Alexander Sulaberidze's Experience at ICA | PGI-4:
During the 1-month internship, I was "attached" to the Neurotec team and the D1 project.
My main goal / task was to use the Gem5 Computer Architecture Simulator to create a software model that simulates a hardware accelerator with the task of performing Vector-Matrix Multiplication operations.
The following is a timeline of the work I did:
Week 1:
During the first week I spent most of my time on getting familiar with the environment and getting to meet the people around me (and squeezing through the bureaucracy). For my first task I simulated a workload containing vector-matrix multiplication running on a CPU and generated some statistics on how many cycles it took for each operation, for binaries compiled at different optimizations.
Week 2:
Most of week 2 was spent on diving deeper into Gem5 to figure how the software models simulating the hardware are written, all of this to figure out how to develop the VMM Hardware Accelerator model that I had been tasked with.
Week 3:
Week 3 was spent on developing the model architecture. The VMMAccel device is modeled as a memory-mapped I/O device with its own memory-mapped registers ranges:
- Vector - The register range in which the vector elements are written.
- Matrix - The register range in which the matrix elements are written.
- Result - The register range in which the result elements are written.
- Compute - The register that triggers the computation on any write instruction.
The CPU communicates with the device using Load/Store instructions on the address range of the device.
Week 4:
Mostly spent on bug-fixes to the code (Uploaded to the Gitlab repository that the Neurotec team has access to).
During the internship, each week I was part of a weekly review meeting to review my work in the previous week, I was also part of the Neurotec design team's weekly meetings where I got an insightful look at how the team worked together and discussed the design specifics of the project they were working on.
I also had the opportunity to attend a 2-hour review session of the project in which the team presented an in-depth technical overview of the project to figures from outside of the institute, which was very interesting to be a part of.
I would say my work culminated on the Tuesday of my last week, when I gave a talk at the weekly event: Vortragsreihe (lecture series), about the Co-Design of Neuromorphic Hardware Accelerators Using the Gem5 Simulator.
As a conclusion, I consider this internship a very valuable experience as it allowed me to peek inside the research process and learn about the way things work there, as well as giving me the opportunity to learn and utilize the Gem5 simulator which, besides being useful in its own right, gave me the chance to practice and hone my programming skills.
