Yasmeen Neyaz Salwa - DR Project
Dynamical Systems for Computation
Scalable Dynamic Computing Hardware
Large-scale optimization problems and simulation of large networks involve finding the best solution among a vast number of possibilities. Such problems stem from various use cases in logistics, finance, operations research, power grid load optimization and so on. Due to the inherent sequential processing in traditional Van Neumann architectures data is always in transit between processing and storage, resulting in large energy consumptions and large computing requirements due to sheer size of the problem. Many Optimization problems such as combinatorial optimization (e.g Traveling Salesman, Graph portioning) and nonlinear optimization are NP Hard (Non-deterministic Polynomial time) and require massive parallelisms to explore large solution spaces efficiently.
Contact
Dr. -Ing Arun Ashok
Scientific Coordinator
Scalable Dynamic Computing Hardware
A promising approach to solve these large-scale optimization problems is to employ Ising hardware solvers. An Ising machine with coupled oscillators has proven to be an excellent candidate for these. At PGI-4 CMOS based coupled oscillators are being studied aiming at scalability and power efficiency. An initial implemention of the Kuramoto model in form of integrated coupled Phase locked loops is shown here. The research will throw light on the system implementations of a small cluster of PLLs, which will pave way for large-scale systems.
Here a type-II PLL is modified to account for multiple input phase comparison. 7 PLLs are coupled all to all creating a cluster and single such cluster can then be combined with other clusters resulting in an ensemble of coupled systems.
In 2025, we received a first prototype of on-chip coupled oscillators, manufactured in a 28 nm bulk CMOS technology. With this chip, we investigate the coupling behavior for chaotic systems …
Doctoral Researches - DR Projects
Meet the Team
Last Modified: 12.03.2025