(leer)

Navigation and service


Charge Transport through Surfaces

Electrical resistance of individual defects at a topological insulator surface

Three-dimensional topological insulators host surface states with linear dispersion, which manifest as a Dirac cone. Nanoscale transport measurements provide direct access to the transport properties of the Dirac cone in real space and allow the detailed investigation of charge carrier scattering with great detail. Here, we use scanning tunneling potentiometry to analyze the resistance of different kinds of defects at the surface of a (Bi0.53Sb0.47)2Te3 topological insulator thin film. The largest localized voltage drop we find to be located at domain boundaries in the topological insulator film, with a resistivity about four times higher than that of a step edge. Furthermore, we resolve resistivity dipoles located around nanoscale voids in the sample surface. The influence of such defects on the resistance of the topological surface state is analyzed by means of a resistor network model. The effect resulting from the voids is found to be small compared to the other defects.



Nanoscale Potentiometry measurementsNanoscale Potentiometry measurements at a topological insulator surface showing a large potential drop at a domain boundary (DB) and a four times smaller potential drop at a step edge.



Image (a) shows an overlay of topography as terrain and potential distribution as color code. The topography is dominated by quintuple layer steps while in the potential we observe an overall linear voltage slope on the terraces and additional voltage jumps located along lines at the sample surface, e.g. the one highlighted by the yellow arrow. Scan size: 300 nm. (b) Topography showing two quintuple layer steps at the sample surface. The section indicated by the solid white line is shown in (d). Scale bar: 20 nm. (c) Corresponding potential map with subtracted linear background. Sharp voltage drops are located at the position of topographic steps and along the dotted line which we explain as a domain boundary in the topological insulator film. The corresponding potential section indicated by the solid white line is shown in (d): Black line graph: Height profile from (b). Red line graph: Potential section from (c). More information can be found in: Nat. Commun. 8 (2017) 15704.


Nanoscale Potentiometry 2Resistivity dipoles around nanoscale voids

Figure (a) shows an STM image of a typical void in the topological insulator thin film surface. Scale bar: 5 nm. (b) Corresponding potential map showing a dipole shaped feature centered at the defect. The lobes of the dipole are aligned with the macroscopic current direction. (c) Resistor network model mask with indicated schematic of the resistors. (d) Calculated potential distribution around the defect resulting from the resistor network model shown in (c), after background subtraction. (e) Sections indicated in (a)-(d). Solid black line: Experimental height profile section from (a). Solid red line: Experimental potential section from (b). Dashed black line: Section of the model system shown in (c). Dotted blue line: Calculated potential section from (d). More information can be found in Nat. Commun. 8 (2017) 15704.

The measured conductivity of epitaxially grown topological insulator thin films can not only arise due to the desired channel, the topological surface state (TSS), but also from a potentially highly conductive interface layer, undermining the applicability of the on-top grown films in electric devices. We measured the conductivity of a Te/Si(111)-(1 × 1) interface layer by in situ distance-dependent four-probe measurements. For this particular case we find an interface conductivity which is small compared to the typical conductivity of topological surface states. However, this is not the case for all kinds of interface layers, for instance a Bi surface termination as interface layer has a much higher interface conductivity. Details can be found at Rev. B 96 (2017) 035301

Nanoscale Potential Maps (Scanning tunneling potentiometry)

Nanoscale potential maps give valuable insight into the charge transport proper- ties of nanostructures. STP can be performed with a multi-tip STM and allows to map the potential landscape while a current flows through the film/nanostructure under study. Potentiometry maps give insight into fundamental transport properties, such as the influence of defects on the local electric transport.
The implementation is shown in the figure below, with tips 1 and 2 injecting a cur- rent into the nanostructure or surface to be studied, while tip 3 simultaneously measures the topography and also records the electric potential at each image point which is induced by the flowing current.

four-tip scanning tunneling potentiometry setupSchematic of the four-tip scanning tunneling potentiometry setup. Tips 1 and 2 are in contact to the sample surface and inject a lateral current represented by the colored equipotential lines. Tip 3 is in tunneling contact and is scanned across the surface, acquiring the topography map and the potential map simultaneously. The scan area is indicated as red square (largely exaggerated).


The figure below shows an example of a potential map measured on a silicon surface, showing that the lar- gest potential drop occurs at the atomic step edges. Implementing scanning tunneling potentiometry into a multi- tip STM setup has several advantages: (a) The direction of the injected current can be changed quickly. (b) The local current density can be high by positioning the injecting tips close to each other. (c) No external contacts have to be provided to the sample. The potential resolution is a couple of µV. We have applied the STP technique on Si surfaces and could determine the surface conductivity on the terraces as well as the step resistivity. More information can be found in Rev. Sci. Instrum. 86, 123701 (2015).

potentiometry(left:) Potential map on a Si(111)-7x7 surface during current flow from top to bottom. The main potential drop occurs at the atomic step edges. The current flows from the top to the bottom in this image. (right:) Potential map of a Si(111)/Ag-sqrt3 with overlaid topography.

Disentangling surface conductivity from bulk conductivity by distance dependent four probe measurements

As nano-devices become smaller and smaller, the surface to volume ratio (i.e. the fraction of atoms located at the surface) increases constantly. The increasing importance of surface conductance compared to conductance through the bulk in modern nanoelectronic devices calls for a reliable determination of the surface conductivity in order to minimize the influence of undesired leakage currents on the device performance or to use surfaces as functional units.
A model system for corresponding investigations is the Si(111)-7×7 surface. The challenge is to disentangle the contribution due to the surface conductivity from the bulk conductivity. We have recently developed a method which uses distance dependent four-probe measurements in the linear configuration in order to determine the surface conductivity. More information can be found in Phys. Rev. Lett. 115 (2015) 066801 and in Phys. Rev. B 95 (2017) 075310.

sicondDistance dependent measurement of the four-point resistance on a Si(111)-7×7 sample.


The anisotropy of the surface conductance

The anisotropy of the surface conductivity can be measured by the four-probe method, when the tips are arranged in a square arrangement and are rotated (see figure).

rotationThe anisotropy of the surface conductance can be determined using rotated tip configurations (optical microscope view). (a) Schematic of the square four-point configuration with the steps on the surface indicated by the diagonal lines. The square given by the tip positions on the sample is rotated, as also shown in the actual microscopy images (b)– (c).

In the current case the anisotropy is induced by a parallel arrangement of atomic steps on the surface. If the injected current runs parallel to the step edges, the measured four-point resistance is lower than for a current directed perpendicular to the step edges. The continuous behavior of the measured four-point resistance as function of the rotation angle on a Si(111)-7×7 surface is shown in the figure below. From these data the step resistivity as well as the resistivity of the terraces can be determined. More information can be found in Phys. Rev. Lett. 115 (2015) 066801.

anisoAnisotropy of the surface conductivity of the Si(111)- 7x7 surface. Four-point resistance measured as function of the rotation angle. The resistance is low if the current is directed parallel to the step edges, while it is large when the current is perpendicular to the step edges.



Servicemeu

Homepage