POWER Acceleration and Design Center: 2016 Workshop

Start
17th October 2016 11:00 AM
End
18th October 2016 01:00 PM
Location
Jülich Supercomputing Centre, Rotunda, building 16.4, room 301

The “POWER Acceleration and Design Center” (PADC) has been established in 2015 to facilitate joined efforts on high-performance computing based on solutions emerging in the context of the OpenPOWER Foundation. With this annual workshop we will bring together experts from different areas to present their experience on applications and new technologies.

With different providers of HPC solution joining the OpenPOWER Foundation new opportunities for future supercomputer architectures emerge. To enable and improve their use by scientists and engineers that target the grand challenges facing society in the fields of energy and environment, information and healthcare, IBM, JSC and NVIDIA have set up the “POWER Acceleration and Design Center” (PADC). With this annual workshop we will bring together experts from different areas to present their experience on applications and new technologies.

Speakers

Benedikt Anlauf (IBM), Costas Bekas (IBM), Marcel Bornemann (FZJ/IAS), Markus Bühler (IBM), Christoph Hagleitner (IBM), Michael Haidl (U Münster), Andreas Herten (FZJ/JSC), Marcel Huysegoms (FZJ/INM), Guido Juckeland (HZDR), Jiri Kraus (NVIDIA), Thilo Maurer (IBM), Charles Moulinec (STFC), Thomas Röhrl (FAU)

Save to calendar (ICS)
Last Modified: 16.11.2022