High-Density Memory with High Retention Time for Cryogenic, Quantum and Neuromorphic Applications

TO-128 • PT 1.3008 • As of 10/2023
Peter Grünberg Institute
Semiconductor Nanoelectronics (PGI-9)

Technology

Our novel non-volatile memory describes a proven concept for the operation of a memory cell which can operate at temperatures from 300 K to < 4K and store multiple states. The memory cell comprises a layer for collecting charge carriers (electrons or holes) on its surface.

The storage of these charges is achieved by applying an electric field to the layer, which consists of a lightly doped semiconductor and a thin electrically insulating layer. The memory cell does not require an additional capacitor like conventional DRAM cells, making it ideal for integration into small-scale technologies.

The memory cell is based on advanced CMOS technology, offering very high scalability and most importantly ultra-low energy.

Problem addressed

A conventional DRAM cell (Dynamic Random Access Memory) consists of a transistor and a capacitor. The transistor can be a field-effect transistor with three terminals: Source, Gate, and Drain. The DRAM cell can store data in the form of charge on a capacitor if a certain voltage is applied to the Gate terminal.

The charged state of a capacitor thus represents a "1" state, while the uncharged state represents a "0" state. Such a DRAM cells allow for digital, but not for analogue information storage. Moreover, the charge escapes over time, requiring the DRAM cell to be refreshed at certain intervals.

These refresh operations waste and impact system performance and worsen as DRAM density increases. Moreover, conventional DRAM cells show a disadvantage for high-density integration due to the large-size capacitor.

Other technologies, like single transistor DRAM based on partially depleted SOI technology, RRAM may suffer problems of scaling, short retention time and degraded performance at low temperatures.

Solution

Our novel concept for a cryogenic capacitorless Random Access Memory (C2RAM) cell offers several advantages. Firstly, it can store more than binary states, allowing for analogue information storage. This flexibility makes it suitable for applications requiring nuanced data representation.

Additionally, the memory cell can operate at low temperatures, even near absolute zero, making it ideal for quantum computing applications. The cell's ability to retain charge carriers at extremely low temperatures eliminates the need for frequent recharging, enhancing its stability and reliability.

Furthermore, the presence of multiple states is associated with a high storage capacity. The memory cell can be fabricated with 10nm technology or even smaller, enabling high-density integration without the need for additional capacitors. In addition, a very long retention time >10 years is possible. Such a non-volatile memory is indispensable for many analogue applications.

Benefits and Potential Use

Our C2RAM technology offers a promising solution for advanced memory storage in various fields, with a broad temperature range from room temperature down to <4K. It is particularly suitable for quantum computers operating at temperatures below 77 K.

Other ultra-low power applications such as high-performance computing or cryogenic neuromorphic computing are also addressable. The ability to store multiple states and behave like a biological synapse makes C2RAM suitable for artificial neural networks (ANN).

The small size of the memory cell and excellent threshold voltage tunability, especially with a very thin insulating layer, makes the C2RAM attractive for various memory applications. Its CMOS compatibility with various semiconductor alloys, including Si and Ge, extends the potential for commercial applications.

Development Status and Next Steps

The technology concept has already been initially verified and is continuously being developed further. The Peter Grünberg Institute (PGI-9) – Semiconductor Nanoelectronics – already cooperates with numerous national and international companies and scientific partners.

Forschungszentrum Jülich focuses on energy and cost-efficient devices, suitable for various emerging technologies. We are continuously seeking for cooperation partners and/or licensees in this and adjacent areas of research and applications.

TRL

4

IP

DE102022212598.3

View on WIPO Patentscope

Keywords

DRAM cell, Field-effect transistor, retention time, non-volatile memory, artificial synapses, ANNs

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Last Modified: 31.03.2026