Dual-Patent RRAM-Based Crossbar Technology for Reliable Vector-Matrix Calculations

TO-217 • PT 1.3146/1.3147 • As of 06/2025
Peter Grünberg Institute
Integrated Computing Architectures (PGI-4)

Technology

Our advanced crossbar array architectures are designed to accelerate and simplify complex mathematical operations such as vector-matrix calculations – critical for artificial intelligence, signal processing, and other data-intensive applications. At its core, a crossbar array comprises a grid of vertical and horizontal electrical lines, intersecting at junctions where programmable resistive memory (RRAM) elements – such as memristors – are placed. These RRAM elements store weights or matrix coefficients, while input signals applied along horizontal lines interact with them to produce output signals along vertical lines, representing the results of the computation. Our technology introduces innovative methods for extracting computation results with high accuracy and efficiency, without relying on traditional current or voltage measurements. This architecture enables compact, scalable, and energy-efficient hardware for high-speed parallel processing.

Problem addressed

The most critical challenge with conventional crossbar arrays is the accurate measurement of output currents or voltages in the vertical lines, especially as the size of the array increases. For large-scale arrays, noise and non-linearity in current or voltage detection systems degraded measurement precision, restricting practical array sizes and limiting computational accuracy. Additionally, as the number of elements per vertical line grows, the required measurement circuitry becomes more complex, expensive, and power-hungry. These constraints make it difficult to scale up crossbar arrays for demanding applications such as deep learning or real-time signal processing, where both speed and accuracy are paramount. The prior art thus struggles to balance array size, measurement accuracy, and implementation complexity, hindering the widespread adoption of crossbar-based computing solutions.

Solution

The new technology addresses these challenges through two complementary but distinct patent-protected approaches. Both solutions replace traditional current or voltage-based output measurements with advanced time – or frequency-based signal processing. The patented approach injects a timing signal at one end of each vertical line, which propagates through a series of voltage-controlled delay elements and RRAM-based programmable components at each junction. The total time delay for the signal to traverse the line is measured, providing a highly accurate, noise-resistant representation of the computation result. The second patented approach connects the output of the delay chain back to its input, forming a ring oscillator. The oscillation frequency or phase shift of this oscillator is then measured, which again accurately reflects the computation result. Both methods avoid the pitfalls of current/voltage measurement, enabling larger, more reliable arrays. The main similarity of both approaches is the use of time-based signal propagation, while the key difference of the second approach lies in the use of ring oscillators for frequency/phase-based readout, offering additional flexibility and robustness.

Benefits and Potential Use

The new crossbar array technology is highly versatile and can be applied across a broad spectrum of industries and applications. Both patented approaches are suitable for use in artificial intelligence accelerators, where they enable efficient and scalable hardware for neural network inference and training. They are also well-suited for digital signal processing, scientific computing, and any scenario requiring fast, parallel matrix operations. The technology’s scalability and noise immunity make it particularly attractive for edge computing, IoT devices, and data centre infrastructure, where energy efficiency and computational throughput are critical. While each patent can be implemented independently to deliver substantial benefits, combining both approaches provides even greater flexibility, allowing system designers to select the optimal readout method for specific application requirements.

Development Status and Next Steps

Forschungszentrum Jülich (FZJ) has extensive expertise in this field and holds several patents. Our technology described above is continuously being enhanced. Our Peter Grünberg Institute (PGI-4) – Integrated Computing Architectures – already cooperates with numerous national and international companies and scientific partners. Forschungszentrum Jülich focuses on energy and cost-efficient devices suitable for application in various emerging technologies. We are thus constantly seeking cooperation partners and/or licensees in this field and adjacent areas of research and applications.

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